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| Name: libpci3 | Distribution: openSUSE Tumbleweed |
| Version: 3.14.0 | Vendor: openSUSE |
| Release: 2.2 | Build date: Thu Oct 23 14:30:48 2025 |
| Group: System/Libraries | Build host: reproducible |
| Size: 103115 | Source RPM: pciutils-3.14.0-2.2.src.rpm |
| Packager: https://bugs.opensuse.org | |
| Url: https://mj.ucw.cz/sw/pciutils/ | |
| Summary: PCI utility library | |
libpci offers access to the PCI configuration space.
GPL-2.0-or-later
* Thu Oct 23 2025 Jean Delvare <jdelvare@suse.com>
- pciutils.spec: Add a strict dependency to libpci. [bsc#1252338]
Mixing different versions of pciutils and libpci could result in
a segmentation fault due to incompatible ABI.
* Sun Jul 20 2025 Andreas Stieger <andreas.stieger@gmx.de>
- Update to 3.14.0:
* New capabilities are decoded: VirtIO SharedMemory, Physical
Layer 16 to 64 GT/s, Flit Mode, Device 3, Intel vendor-
specific.
* <lib/header.h> got definitions of new classes and capabilities
from PCI Code and ID Assignment rev 1.18
* <lib/pci.h> can be included from C++ programs
* Updated pci.ids
* Thu Mar 13 2025 Peter Simons <psimons@suse.com>
- Synchronize SLE-12 and openSUSE:Factory [jsc#PED-4587].
The following patches are now obsolete in version 3.13.0:
* add-decoding-of-vendor-specific-vpd-fields.patch
* pciutils-3.1.7-fix-memory-leak-in-get_cache_name.patch
* pciutils-3.2.0_update-dist.patch
* pciutils-3.5.1-add-support-for-32-bit-pci-domains.patch
* pciutils-lspci-Correct-Root-Capabilities-CRS-Software-Visibil.patch
* show-gen4-speed-properly.patch
* Fri Jul 19 2024 Peter Simons <psimons@suse.com>
- Synchronize SLE-15 and openSUSE:Factory [jsc#PED-8393, bsc#1224138].
The following patches are now obsolete in version 3.13.0:
* lspci-Fixed-buffer-overflows-in-ls-tree.c.patch
* pciutils-Add-PCIe-5.0-data-rate-32-GT-s-support.patch
* pciutils-Add-PCIe-6.0-data-rate-64-GT-s-support.patch
* pciutils-Add-decoding-of-vendor-specific-VPD-fields.patch
* pciutils-VPD-Cleanup.patch
* pciutils-VPD-When-printing-item-IDs-escape-non-ASCII-characte.patch
* Sun Jun 30 2024 Dirk Müller <dmueller@suse.com>
- update to 3.13.0:
* lspci decodes CXL 1.1 device link status information.
* Further development of the pcilmr (the link margining
utility)
* Dump parsing supports 6-digit domain numbers.
* Bug fixes in PCIe link state reporting.
* Decode more fields in PCIe AER capability.
* Fixed build on Linux systems with musl libc.
* Updated pci.ids.
* Sun Jun 09 2024 Andreas Stieger <andreas.stieger@gmx.de>
- update to 3.12.0:
* lspci decodes the IDE (Integrity & Data Encryption) and
TEE-IO extended capabilities.
* Optimization flags used for compiling individual object files
should be the same as optimization flags for linking the final
executable to make link-time optimization possible.
* no longer look up subsystems in the HWDB
* Updated pci.ids
- include changes from 3.11:
* update-pciids now supports XZ compression
* update-pciids now sends itself as the User-Agent.
* Added a pcilmr utility for PCIe lane margining
* ECAM back-end now scans ACPI and BIOS memory faster.
* Linux systems without pread/pwrite are no longer supported
* Improved decoding of PCIe control and status registers.
* Decoding of CXL capabilities now supports up to CXL 3.0.
* lspci now displays interrupt message numbers consistently across
different capabilities.
* Cache of IDs resolved via DNS, which was located in ~/.pci-ids
by default, is now stored according to the XDG base directory
specification in $XDG_CACHE_HOME/pci-ids.
* All source files now have SPDX license identifiers.
* various minor bug fixes and updated pci.ids.
* Wed Oct 04 2023 Peter Simons <psimons@suse.com>
- Apply "lspci-Fixed-buffer-overflows-in-ls-tree.c.patch" to fix a
buffer overflow error that would cause lspci to crash on systems
with complex topologies. [bsc#1215265]
- Add "pciutils.keyring" so that the tarball's signature can be
verified at build time.
- Use "%license" tag instead of "%doc" to install the package's
license file.
* Thu May 11 2023 Paolo Stivanin <info@paolostivanin.com>
- Update to 3.10.0:
- Fixed bug in definition of versioned symbol aliases
in shared libpci, which made compiling with link-time
optimization fail.
- Filters now accept "0x..." syntax for backward compatibility.
- Windows: The cfgmgr32 back-end which provides the list of devices
can be combined with another back-end which provides access
to configuration space.
- ECAM (Enhanced Configuration Access Mechanism), which is defined
by the PCIe standard, is now supported. It requires root privileges,
access to physical memory, and also manual configuration on some
systems.
- lspci: Tree view now works on multi-domain systems. It now respects
filters properly.
- Last but not least, pci.ids were updated to the current snapshot
of the database. This includes overall cleanup of entries with
non-ASCII characters in their names -- such characters are allowed,
but only if they convey interesting information (e.g., umlauts
in German company names, but not the "registered trade mark" sign).
* Tue Dec 27 2022 Ludwig Nussel <lnussel@suse.com>
- Replace transitional %usrmerged macro with regular version check (boo#1206798)
* Fri Dec 02 2022 Dirk Müller <dmueller@suse.com>
- update to 3.9.0:
* We decode Compute Express Link (CXL) capabilities.
* The tree mode of lspci is now compatible with filtering options.
* When setpci is used with a named register, it checks whether
the register is present in the particular header type.
* Linux: The intel-conf[12] back-ends prefer to use ioperm() instead
of iopl() to gain access to I/O ports.
* mmio-conf1(-ext): Added a new back-end implementing the intel-conf1
interface over MMIO. This is useful on some ARM machines, but it
requires manual configuration of the MMIO addresses.
* As usually, updated pci.ids to the current snapshot of the database.
/usr/lib64/libpci.so.3 /usr/lib64/libpci.so.3.14.0 /usr/share/licenses/libpci3 /usr/share/licenses/libpci3/COPYING
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